An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).

Last update: Dec 29, 2022

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Overview

Sextans

Sextans is an accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM). One exciting feature is that we only need to prototype Sextans once, and the hardware supports an arbitrary SpMM. Following are software and hardware dependencies.

Xilinx Vitis 2020.2
Alveo U280 HBM FPGA
Alveo U250 FPGA

To learn more about the techinqual details, please see this link.

If you find this code useful, please cite:

@inproceedings{song2022sextans,
author = {Linghao Song and Yuze Chi and Atefeh Sohrabizadeh and Young-kyu Choi and Jason Lau and Jason Cong},
title = {Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication},
booktitle={The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays},
year = {2022}
}

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Comments

Compiled SPMM on U200

Hi, As I compiled ur spmm kernel for U200. And it generated host file.

Could u provide some information about how to define these values: ./host [matrix A file] [N] [ALPHA] [BETA] [rp_time]

how to use matrix A file? and could u give a example rp_time is stand for ?

Thanks,

opened by lloo099 1
Implement Sextans with TAPA

The TAPA implementation uses loops, arrays, and library functions to reduce the lines of code. The async_mmap implementation reduces the BRAM usage for m_axi.

opened by Blaok 0

Releases(v1.1)

v1.1(Jul 27, 2022)

Tapa version, architecture modified for better place and route with Tapa+Autobridge.
Source code(tar.gz)
Source code(zip)
v1.0(Jan 3, 2022)

Source code(tar.gz)
Source code(zip)

Owner

linghao.song

GitHub

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