# Intel Homomorphic Encryption Acceleration Library for FPGAs

##### Overview

main: development:

# Intel Homomorphic Encryption Acceleration Library for FPGAs (Intel HEXL for FPGA)

Intel ®️ HEXL for FPGA is an open-source library that provides an implementation of homomorphic encryption primitives on Intel FPGAs. Intel HEXL for FPGA targets integer arithmetic with word-sized primes, typically 40-60 bits. Intel HEXL for FPGA provides an API for 64-bit unsigned integers and targets Intel FPGAs.

## Introduction

Many cryptographic applications, particularly homomorphic encryption (HE), rely on integer polynomial arithmetic in a finite field. HE, which enables computation on encrypted data, typically uses polynomials with degree `N:` a power of two roughly in the range `N=[2^{10}, 2^{14}]`. The coefficients of these polynomials are in a finite field with a word-sized primes, `p`, up to `p`~62 bits. More precisely, the polynomials live in the ring `Z_p[X]/(X^N + 1)`. That is, when adding or multiplying two polynomials, each coefficient of the result is reduced by the prime modulus `p`. When multiplying two polynomials, the resulting polynomials of degree `2N` is additionally reduced by taking the remainder when dividing by `X^N+1`.

The primary bottleneck in many HE applications is polynomial-polynomial multiplication in `Z_p[X]/(X^N + 1)`. Intel HEXL for FPGA provides an experimental implementation of the basic primitives for accelerating polynomial multiplication. We distribute the basic primitives as source code with open source Apache 2.0 license, which allows developers and communities to experiment with the polynomial multiplication.

Intel HEXL for FPGA implements the negacyclic number-theoretic transform (NTT) that is commonly used n polynomial multiplication. We also provide an alternative polynomial multiplication using dyadic multiplication algorithms. To multiply two polynomials, `p_1(x), p_2(x)` using the NTT, we perform the forward number-theoretic transform on the two input polynomials, then perform an element-wise modular multiplication, and perform the inverse number-theoretic transform on the result.

Intel HEXL for FPGA implements the following functions:

• The forward and inverse negacyclic number-theoretic transform (NTT).
• Dyadic multiplication.

For each function, the library provides an FPGA implementation using OpenCL.

NOTE: This distribution aims at allowing researchers, developers, and community access to FPGA kernel source code, to experiment with and test the functionality of the basic primitives.

NOTE: This distribution provides an experimental integrated kernel implementing the NTT/INTT and the dyadic multiplication in one file. We also provide for convenience kernels implementing only one function stand alone. Those FPGA kernels work independently of each other, i.e. one does not require the use of another. The stand alone kernels allow testing and experimentation on a single primitive.

NOTE: This distribution in its current version does not fully address the inherent I/O bottlenecks typically associated with an external accelerator card.

## Setting up Environment

To use this code, a prerequisite is to install a PCIe card Intel PAC D5005 and its software stack, named Intel Acceleration Stack, which includes Quartus Prime, Intel FPGA SDK and Intel PAC D5005 board software package. See PREREQUISITE.md for details. If you have already installed the PCIe card and above mentioned softwares you can skip the procedure in the link given below.

You can find installation instructions for the FPGA PAC D5005 board software package following this link:
Hardware/Software Installation link

Check that your installation is functional with the software environment by running the Hello FPGA test code as indicated in the above link.

## Building Intel HEXL for FPGA

Building Intel HEXL for FPGA library requires building all the depedencies ( mostly dealt automatically by cmake scripts) and two other separate pieces:

• Host application and related dependencies.
• FPGA kernels and HLS libraries needed by the kernels.

From user point of view it is required to go through these two main steps. Without building kernels, tests, benchmark and examples cannot be launched.

### Dependencies

We have tested Intel HEXL for FPGA on the following operating systems:

• Centos 7.9.2009
• To check your Centos 7 version:
``````cat /etc/centos-release
``````

Intel HEXL for FPGA requires the following dependencies:

Dependency Version
Centos 7 7.9.2009
CMake >= 3.5
Compiler g++ >= 9.1
Doxygen 1.8.5
Hardware PCIe Card PAC D5005

### Create Build Directory and Configure cmake Build

After cloning the git repository into your local area, you can use the following commands to set the install path and create a build directory. It will also create cmake cache files and make files that will be used for building host and kernels. Most of the build options described in previous section can be enabled or disabled by modifying the command given below:

``````cmake -S . -B build -DCMAKE_INSTALL_PREFIX=./hexl-fpga-install -DCMAKE_BUILD_TYPE=Release -DCMAKE_CXX_COMPILER=g++ -DCMAKE_C_COMPILER=gcc -DENABLE_FPGA_DEBUG=ON -DENABLE_TESTS=ON -DENABLE_DOCS=ON -DENABLE_BENCHMARK=ON
``````

Different cmake options are provided allowing users to configure the overall build process. With these options the user can control if it is required to build tests, benchmark etc. Note that by default all options are off: the user must enable at least a few options to create a useful code. The recommended options can be found below. The details of these options is given in next section with default selection:

#### Configuration Options

In addition to the standard CMake configuration options, Intel HEXL for FPGA supports several cmake options to configure the build. For convenience, they are listed below:

CMake option Values
ENABLE_BENCHMARK ON / OFF (default OFF) Set to OFF, enable benchmark suite via Google benchmark
ENABLE_FPGA_DEBUG ON / OFF (default OFF) Set to OFF, enable debug log at large runtime penalty
ENABLE_TESTS ON / OFF (default OFF) Set to OFF, enable building of unit-tests
ENABLE_DOCS ON / OFF (default OFF) Set to OFF, enable building of documentation

### Compiling Intel HEXL for FPGA

Compiling HEXL for FPGA requires two steps: compiling the C++ host code and compiling the OpenCL kernels. Start by compiling the kernels as they will be needed during the host installation. Before proceeding to the compilations and installation, make sure that your environment variables are set according to the instructions in the Intel PACD5005 Software Package installation guide.

#### Compiling Device Kernels

The kernels can be compiled in two different modes, emulation and FPGA. The emulation mode runs the kernels on the CPU. Compiling in emulation mode takes only a few minutes. The resulting bitstream can be used to verify the functionality of kernels on the CPU. The FPGA mode builds the kernel bitstream for FGPA card. Compiling the kernels in FPGA mode can take a few hours.

##### Compile Kernels for Emulation

To compile the device kernel for running in emulation mode:

``````cmake --build build --target emulation
``````

This command takes a few minutes to execute.

NOTE: If you are interested to run kernels in software emulation mode only then this step is enough and you can move to building the host code. If you want to run the kernels on actual FPGA board please follow the next steps for building bitstream for the FPGA card.

##### Compile Kernels for Generating FPGA Bitstream

To compile the device kernel in fpga mode:

``````cmake --build build --target fpga
``````

This command takes a few hours to execute.

The bitstreams will be located in the installation directory specified when calling the cmake command.(See installation below)

#### Compiling Host Side

To build the host application, tests, benchmark, and documentation (depending on the options selected above) run the following command:

``````cmake --build build
``````

This will build the Intel HEXL for FPGA library in the `build/host/` directory.

## Installing Intel HEXL for FPGA

After compiling both host side and device kernels, users need to install HEXL for FPGA as a standalone library. The library is used for building and running HEXL for FPGA tests and benchmarks, and it can also be used as a third-party library. To install Intel HEXL for FPGA to the installation directory specified at configuration time:

``````cmake --install build
``````

## Testing Intel HEXL for FPGA

To run a set of unit tests via Googletest run the following command ( for running the test you should have chosen `-DENABLE_TESTS=ON` otherwise tests may not be enabled) (see Configuration Options).
Make sure that the .aocx files have been installed in the install directory that was chosen during configuration. The default choice we made was "./hexl-fpga-install".

### Run Tests in Emulation Mode

In emulation mode the kernel will run on the CPU and the user will be able to test and validate the kernel.
To run in emulation mode (setting RUN_CHOICE to different values informs host code about emulation mode or FPGA run):

``````export RUN_CHOICE=1
cmake --build build --target tests
``````

### Run Tests on FPGA Card

To run using actual FPGA card, run the following command (setting RUN_CHOICE to different values informs host code about emulation mode or FPGA run):

``````export RUN_CHOICE=2
cmake --build build --target tests
``````

The tests executables are located in `build/tests/` directory

## Benchmarking Intel HEXL for FPGA

To run a set of benchmarks via Google benchmark, configure and build Intel HEXL for FPGA with `-DENABLE_BENCHMARK=ON` (see Configuration Options).
Make sure that the .aocx files have been installed in ``` /bench/ ``` directory.

### Run Benchmarks in Emulation Mode

To run the benchmark in emulation mode:

``````export RUN_CHOICE=1
cmake --build build --target bench
``````

### Run Benchmarks on FPGA Card

To run the benchmark on the fpga, run

``````export RUN_CHOICE=2
cmake --build build --target bench
``````

The benchmark executables are located in `build/benchmark/` directory

## Using Intel HEXL for FPGA

The `examples` folder contains an example showing how to use Intel HEXL for FPGA library in a third-party project. See examples/README.md for details.

## Debugging

For optimal performance, Intel HEXL for FPGA does not perform input validation. In many cases the time required for the validation would be longer than the execution of the function itself. To debug Intel HEXL for FPGA, configure and build Intel HEXL for FPGA with the option
`-DCMAKE_BUILD_TYPE=Debug` This will generate a debug version of the library that can be used to debug the execution. To enable the FPGA logs, configure the build with `-DENABLE_FPGA_DEBUG=ON` (see Configuration Options).

NOTE: Enabling `-DCMAKE_BUILD_TYPE=Debug` will result in a significant runtime overhead.

# Documentation

See https://intel.github.io/hexl-fpga for Doxygen documentation.

Intel HEXL for FPGA supports documentation via Doxygen. To build documentation, first install `doxygen` and `graphviz`, e.g.

`sudo yum install doxygen graphviz`

Then, configure Intel HEXL for FPGA with `-DENABLE_DOCS=ON` (see Configuration Options).

### Doxygen

To build Doxygen documentation, after configuring Intel HEXL for FPGA with `-DENABLE_DOCS=ON`, run

``````cmake --build build --target docs
``````

To view the generated Doxygen documentation, open the generated `build/doc/doxygen/html/index.html` file in a web browser.

NOTE: After running the cmake --install build command, the documentation will also be available in:
``` /doc/doxygen/html/index.html ```.

# Contributing

At this time, Intel HEXL for FPGA welcomes external contributions. To contribute to Intel HEXL for FPGA, see CONTRIBUTING.md. We encourage feedback and suggestions via Github Issues as well as discussion via Github Discussions.

Please use pre-commit to validate the formatting of the code before submitting a pull request.
To install pre-commit:

``````pip install --user cpplint pre-commit
``````

To run pre-commit:

``````pre-commit run --all
``````

## Pull request acceptance criteria (Pending performance validation)

Pull requests will be accepted if they provide better acceleration, fix a bug or add a desirable new feature.

Before contributing, please run

`cmake --build build --target tests`

and make sure pre-commit checks and all unit tests pass.

``````pre-commit run --all
``````

## Repository layout

Public headers reside in the `hexl-fpga-install/include` folder. Private headers, e.g. those containing fpga code should not be put in this folder.

# Citing Intel HEXL for FPGA

To cite Intel HEXL for FPGA, please use the following BibTeX entry.

### Version 1.0

```    @misc{IntelHEXLFPGA,
author={Meng,Yan and de Souza, Fillipe D. M. and Butt, Shahzad and de Lassus, Hubert and González Aragón, Tomás and Zhou, Yongfa and Wang, Yong and others},
title = {{I}ntel {Homomorphic Encryption Acceleration Library for FPGA} (Version 1.0)},
howpublished = {\url{https://github.com/intel/hexl-fpga}},
month = December,
year = 2021,
key = {Intel HEXL for FPGA}
} ```

# Contributors

The Intel contributors to this project, sorted by last name, are

# Contact us

• #### building on intel dev cloud fails

Hi, trying to test your project on the intel dev cloud as I dont have a physical fpga

u177856@s001-n144:~/hexl-fpga-2.0\$ cmake --build . --target emulation Scanning dependencies of target emulation [100%] Compiling for emulation ./compile.sh: 7: ./config.sh: kernels+= dyadic_multiply: not found ./compile.sh: 8: ./config.sh: kernels+= fwd_ntt: not found ./compile.sh: 9: ./config.sh: kernels+= inv_ntt: not found ./compile.sh: 10: ./config.sh: kernels+= keyswitch: not found ./compile.sh: 11: ./config.sh: kernels+= dyadic_multiply_keyswitch: not found ./compile.sh: 14: ./config.sh: config_dyadic_multiply+= -Xsboard=intel_s10sx_pac:pac_s10_usm: not found ./compile.sh: 15: ./config.sh: config_dyadic_multiply+= -Xsclock=400MHz: not found ./compile.sh: 18: ./config.sh: config_fwd_ntt+= -DNUM_NTT_COMPUTE_UNITS=1: not found ./compile.sh: 19: ./config.sh: config_fwd_ntt+= -DVEC=8: not found ./compile.sh: 20: ./config.sh: config_fwd_ntt+= -Xsboard=intel_s10sx_pac:pac_s10_usm: not found ./compile.sh: 21: ./config.sh: config_fwd_ntt+= -Xsclock=400MHz: not found ./compile.sh: 24: ./config.sh: config_inv_ntt+= -DNUM_INTT_COMPUTE_UNITS=1: not found ./compile.sh: 25: ./config.sh: config_inv_ntt+= -DVEC_INTT=8: not found ./compile.sh: 26: ./config.sh: config_inv_ntt+= -Xsboard=intel_s10sx_pac:pac_s10_usm: not found ./compile.sh: 27: ./config.sh: config_inv_ntt+= -Xsclock=360MHz: not found ./compile.sh: 30: ./config.sh: config_keyswitch+= -DCORES=1: not found ./compile.sh: 31: ./config.sh: config_keyswitch+= -Xsno-interleaving=DDR: not found ./compile.sh: 32: ./config.sh: config_keyswitch+= -Xshyper-optimized-handshaking=off: not found ./compile.sh: 33: ./config.sh: config_keyswitch+= -Xsboard=intel_s10sx_pac:pac_s10: not found ./compile.sh: 34: ./config.sh: config_keyswitch+= -Xsclock=240MHz: not found ./compile.sh: 37: ./config.sh: config_dyadic_multiply_keyswitch+= -DCORES=1: not found ./compile.sh: 40: ./config.sh: fpga_args+= -Xsbsp-flow=flat: not found ./compile.sh: 41: ./config.sh: fpga_args+= -Xsseed=789045: not found [100%] Built target emulation

this is for a build with all config options OFF

could you please test using the intel dev cloud environment?

u177856@s001-n144:~/hexl-fpga-2.0\$ lsb_release -a No LSB modules are available. Distributor ID: Ubuntu Description: Ubuntu 18.04.6 LTS Release: 18.04 Codename: bionic

its the only way how to test / try your project without having to own a physical fpga

opened by fixerivan 3
• #### warm up the fpga kernels

warm up the fpga kernels specially the twiddle factors dispatching kernel to make sure the benchmark result more accurate as loading the twiddle factors from DDR to on-chip memory is a once-work.

opened by yzhou79 1
• #### aoc compile error: Internal Compiler Error. Seed argument was passed but could not find any qsf files

I encountered this error when compile the project with fpga mode. I looked up all *.qsf files in my system, they are under Quartus 19.2, Quartus 20.3 and oneApi 2021.3 . my intel_s10sx_pac's path is under oneapi 2022.0 which is: /home/intel/opt/intel/oneapi/compiler/2022.0.2/linux/lib/oclfpga/board/intel_s10sx_pac/

Anyone knows why aoc can not find any .qsf files and stop compiling. Thanks FYI: the emulation mode compilation looks fine.

========> my init_env.sh followed prerequisite: <==========

echo export QUARTUS_HOME="/home/intelFPGA_pro/quartus_19.2.0b57/quartus" export QUARTUS_HOME="/home/intelFPGA_pro/quartus_19.2.0b57/quartus"

echo export OPAE_PLATFORM_ROOT="/home/inteldevstack/d5005_ias_2_0_1_b237" export OPAE_PLATFORM_ROOT="/home/inteldevstack/d5005_ias_2_0_1_b237"

echo export AOCL_BOARD_PACKAGE_ROOT="/home/inteldevstack/d5005_ias_2_0_1_b237/opencl/opencl_bsp" export AOCL_BOARD_PACKAGE_ROOT="/home/inteldevstack/d5005_ias_2_0_1_b237/opencl/opencl_bsp" if ls /dev/intel-fpga-* 1> /dev/null 2>&1; then echo source \$AOCL_BOARD_PACKAGE_ROOT/linux64/libexec/setup_permissions.sh #source \$AOCL_BOARD_PACKAGE_ROOT/linux64/libexec/setup_permissions.sh >> /dev/null source \$AOCL_BOARD_PACKAGE_ROOT/linux64/libexec/setup_permissions.sh fi OPAE_PLATFORM_BIN="/home/inteldevstack/d5005_ias_2_0_1_b237/bin" if [[ ":\${PATH}:" = ":\${OPAE_PLATFORM_BIN}:" ]] ;then echo "\$OPAE_PLATFORM_ROOT/bin is in PATH already" else echo "Adding \$OPAE_PLATFORM_ROOT/bin to PATH" export PATH="\${PATH}":"\${OPAE_PLATFORM_BIN}" fi

echo export AOCL_BOARD_PACKAGE_ROOT="/home/intel/opt/intel/oneapi/compiler/2022.0.2/linux/lib/oclfpga/board/intel_s10sx_pac" export AOCL_BOARD_PACKAGE_ROOT="/home/intel/opt/intel/oneapi/compiler/2022.0.2/linux/lib/oclfpga/board/intel_s10sx_pac"

if ls /dev/intel-fpga-* 1> /dev/null 2>&1; then echo source \$AOCL_BOARD_PACKAGE_ROOT/linux64/libexec/setup_permissions.sh #source \$AOCL_BOARD_PACKAGE_ROOT/linux64/libexec/setup_permissions.sh >> /dev/null source \$AOCL_BOARD_PACKAGE_ROOT/linux64/libexec/setup_permissions.sh fi

echo export INTELFPGAOCLSDKROOT="/home/intelFPGA_pro/20.3/hld" export INTELFPGAOCLSDKROOT="/home/intelFPGA_pro/20.3/hld"

#Enable Backwards Compatibility with older BSP export ACL_ACDS_VERSION_OVERRIDE="19.2" export QUARTUS_ROOTDIR_OVERRIDE="/home/intelFPGA_pro/quartus_19.2.0b57/quartus"

echo export ALTERAOCLSDKROOT=\$INTELFPGAOCLSDKROOT export ALTERAOCLSDKROOT=\$INTELFPGAOCLSDKROOT export PAC_DMA_WORK_THREAD=yes

QUARTUS_BIN="/home/intelFPGA_pro/20.3/quartus/bin" if [[ ":\${PATH}:" = ":\${QUARTUS_BIN}:" ]] ;then echo "\$QUARTUS_HOME/bin is in PATH already" else echo "Adding \$QUARTUS_HOME/bin to PATH" export PATH="\${QUARTUS_BIN}":"\${PATH}" fi

export AOCL_BOARD_PACKAGE_ROOT=/home/intel/opt/intel/oneapi/compiler/2022.0.2/linux/lib/oclfpga/board/intel_s10sx_pac

echo source \$INTELFPGAOCLSDKROOT/init_opencl.sh #source \$INTELFPGAOCLSDKROOT/init_opencl.sh >> /dev/null source \$INTELFPGAOCLSDKROOT/init_opencl.sh

aocl initialize acl1 pac_s10_usm

========> my init_env.sh finish: <==========

opened by marswy163 1
• #### Merge keyswitch from development into main (#10)

• Added contents to prepare for v1.1 release Added keyswitch kernel support Added integrated kernel support for DyadicMultiply and Keyswitch Deprecated standalone NTT/INTT Updated documentation
opened by ymeng-git 1
• #### fpga_crossgen error

I am trying to deploy this project using pac-a10 board, and got this error during fpga_crossgen step.

``````In file included from /root/workspace/zxwang/hexl_lite/device/lib/hls/mod_ops.cpp:9:
In file included from /opt/intelFPGA_pro/quartus_19.2.0b57/hld/include/HLS/ac_int.h:103:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/algorithm:62:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/bits/stl_algo.h:65:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/random:51:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/x86_64-redhat-linux/bits/opt_random.h:33:
In file included from /opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/x86intrin.h:18:
In file included from /opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/immintrin.h:14:
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:180:10: error: use of undeclared identifier '__builtin_ia32_readeflags_u64'
return __builtin_ia32_readeflags_u64();
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:186:3: error: use of undeclared identifier '__builtin_ia32_writeeflags_u64'
__builtin_ia32_writeeflags_u64(__f);
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:221:10: error: use of undeclared identifier '__builtin_ia32_crc32qi'
return __builtin_ia32_crc32qi(__C, __D);
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:242:10: error: use of undeclared identifier '__builtin_ia32_crc32hi'
return __builtin_ia32_crc32hi(__C, __D);
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:263:10: error: use of undeclared identifier '__builtin_ia32_crc32si'
return __builtin_ia32_crc32si(__C, __D);
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:285:10: error: use of undeclared identifier '__builtin_ia32_crc32di'
return __builtin_ia32_crc32di(__C, __D);
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:291:10: error: use of undeclared identifier '__builtin_ia32_rdpmc'
return __builtin_ia32_rdpmc(__A);
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:297:10: error: use of undeclared identifier '__builtin_ia32_rdtscp'
return __builtin_ia32_rdtscp(__A);
^
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/ia32intrin.h:306:3: error: use of undeclared identifier '__builtin_ia32_wbinvd'
__builtin_ia32_wbinvd();
^
In file included from /root/workspace/zxwang/hexl_lite/device/lib/hls/mod_ops.cpp:9:
In file included from /opt/intelFPGA_pro/quartus_19.2.0b57/hld/include/HLS/ac_int.h:103:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/algorithm:62:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/bits/stl_algo.h:65:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/random:51:
In file included from /usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/x86_64-redhat-linux/bits/opt_random.h:33:
In file included from /opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/x86intrin.h:18:
In file included from /opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/immintrin.h:20:
/opt/intelFPGA_pro/quartus_19.2.0b57/hld/llvm/lib/clang/9.0.0/include/mmintrin.h:33:5: error: use of undeclared identifier '__builtin_ia32_emms'; did you mean '__builtin_isless'?
__builtin_ia32_emms();
^
/usr/lib/gcc/x86_64-redhat-linux/4.8.5/../../../../include/c++/4.8.5/cmath:717:12: note: '__builtin_isless' declared here
{ return __builtin_isless(__x, __y); }
^
...
3448 errors generated.
Error: OpenCL parser FAILED
``````

I have upgraded my g++ to version 9.3.1.

``````(base) [root@localhost hexl-fpga]# gcc --version
gcc (GCC) 9.3.1 20200408 (Red Hat 9.3.1-2)
``````
``````(base) [root@localhost hexl-fpga]# g++ --version
g++ (GCC) 9.3.1 20200408 (Red Hat 9.3.1-2)
``````

Is there any solution for this? Thanks!

opened by magiczixiao 1
• #### prepare for v2.0 oneapi release

• Migrated the HEXL-FPGA library from OpenCL to oneAPI.
• Added experimental bridge to Microsoft SEAL v4.0.0.
• Added framework for comparing performance between HEXL-FPGA and HEXL.
• Updated related documents.
opened by ymeng-git 0
• #### merge and sign the commits

Merge branch 'ymeng/perf-cmp' into ymeng/perf-signed to sign the commits Updated to use released testdata Cherry-picked "warm up the fpga kernels"

opened by ymeng-git 0
• #### Merge keyswitch into development

Prepare v1.1 contents Added KeySwitch FPGA kernel support. Added integrated kernel support for DyadicMultiply and KeySwitch. Deprecated standalone NTT and INTT support, which will be removed in the next release. Documentation updates.

opened by ymeng-git 0
• #### expected speedups?

I am benchmarking the SEAL FPGA integration, but whatever I do I just see slowdown compared to a HEXL enabled AVX512 CPU native SEAL execution

did you try to run some SEAL benchmarks for the FPGA kernels? I am not sure if I am doing something wrong or this is expected due to its experimental stage ...

thanks!

opened by fixerivan 2
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###### LibSWIFFT - A fast C/C++ library for the SWIFFT secure homomorphic hash function

LibSWIFFT - A fast C/C++ library for the SWIFFT secure homomorphic hash function Official Repository LibSWIFFT is a production-ready C/C++ library pro

23 Oct 23, 2022
###### Rubicon - a New Custom Encryption Algorithm/Tool

Rubicon - a New Custom Encryption Algorithm/Tool Disclaimer DO NOT use this project for purposes other than legitimate red teaming/pentesting jobs

27 Dec 13, 2022
###### In cryptography, a cipher is an algorithm for performing encryption or decryption.

Cipher 1.0 In cryptography, a cipher is an algorithm for performing encryption or decryption. What can be done using this program? This program can us

1 Apr 21, 2022
###### FractalCrypt - Free cryptoarchiver permitting any number of hidden volumes for deniable encryption

FractalCrypt - Free cryptoarchiver permitting any number of hidden volumes for deniable encryption

360 Dec 12, 2022
###### obfuscated any constant encryption in compile time on any platform

oxorany 带有混淆的编译时任意常量加密 English 介绍 我们综合了开源项目ollvm、xorstr一些实现思路，以及c++14标准中新加入的constexpr关键字和一些模板的知识，完成了编译时的任意常量的混淆(可选)和加密功能。

154 Dec 29, 2022
###### Oceantoo is an XOR/LFSR based encryption algorithm

Oceantoo Oceantoo is an XOR/LFSR based encryption algorithm What is an LFSR? A linear-feedback shift register (LFSR) is a method of manipulating a num

7 Aug 2, 2022
###### a new encryption algorithm that uses increments instead of XOR

incrypt a new encryption algorithm that uses increments instead of XOR. how to compile for linux: gcc incrypt.c -o incrypt gcc dicrypt.c -o dicrypt ho

1 Nov 24, 2021
###### inetd-style TLS encryption wrapper

Description The tlswrapper is an TLS encryption wrapper between remote client and local program prog. Is executed from systemd.socket/inetd/tcpserver/

2 Dec 22, 2022
###### Transparent file encryption in git

git-crypt - transparent file encryption in git git-crypt enables transparent encryption and decryption of files in a git repository. Files which you c

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###### Collection of common encryption.

EasyCipher 概述 EasyCipher收集了几种常见的加密方法的C语言实现，并基于Android平台封装了jni接口。 提供的加密方法包括 AES加密核心部分，不涉及模式和padding，支持128bits和256bits AES/CBC/PKCS5Padding SHA256 HAMC-

7 Aug 19, 2022
###### An implementation of Advanced Encryption Standard with calculative optimization

An implementation of Advanced Encryption Standard with calculative optimization. Complete round operations in a single function.

1 Jan 24, 2022
524 Jan 2, 2023
###### free C++ class library of cryptographic schemes

Crypto++: free C++ Class Library of Cryptographic Schemes Version 8.4 - TBD Crypto++ Library is a free C++ class library of cryptographic schemes. Cu

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###### C++11 header-only message digest library

digestpp Experimental C++11 header-only message digest library. Derived from cppcrypto in an attempt to devise a more modern yet flexible and universa

150 Dec 24, 2022
###### A modern, portable, easy to use crypto library.

Sodium is a new, easy-to-use software library for encryption, decryption, signatures, password hashing and more. It is a portable, cross-compilable, i

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###### A lightweight, secure, easy-to-use crypto library suitable for constrained environments.

The Hydrogen library is a small, easy-to-use, hard-to-misuse cryptographic library. Features: Consistent high-level API, inspired by libsodium. Instea

457 Dec 21, 2022
###### An open source, portable, easy to use, readable and flexible SSL library

README for Mbed TLS Mbed TLS is a C library that implements cryptographic primitives, X.509 certificate manipulation and the SSL/TLS and DTLS protocol

3.9k Jan 7, 2023