DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks

Overview

DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks

DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is intended to study new architectures, such as near-data processing.

The DAMOV benchmark suite is the first open-source benchmark suite for main memory data movement-related studies, based on our systematic characterization methodology. This suite consists of 144 functions representing different sources of data movement bottlenecks and can be used as a baseline benchmark set for future data-movement mitigation research. The applications in the DAMOV benchmark suite belong to popular benchmark suites, including BWA, Chai, Darknet, GASE, Hardware Effects, Hashjoin, HPCC, HPCG, Ligra, PARSEC, Parboil, PolyBench, Phoenix, Rodinia, SPLASH-2, STREAM.

The DAMOV framework is based on two widely-known simulators: ZSim and Ramulator. We consider a computing system that includes host CPU cores and PIM cores. The PIM cores are placed in the logic layer of a 3D-stacked memory (Ramulator's HMC model). With this simulation framework, we can simulate host CPU cores and general-purpose PIM cores to compare both for an application or parts of it.

Citation

Please cite the following preliminary version of our paper if you find this repository useful:

Geraldo F. Oliveira, Juan Gómez-Luna, Lois Orosa, Saugata Ghose, Nandita Vijaykumar, Ivan Fernandez, Mohammad Sadrosadati, Onur Mutlu, "DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks". arXiv:2105.03725 [cs.AR], 2021.

Bibtex entry for citation:

@misc{deoliveira2021damov,
  title={{Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture}},
  author={Geraldo F. Oliveira and Juan Gómez-Luna and Lois Orosa and Saugata Ghose and Nandita Vijaykumar and Ivan Fernandez and Mohammad Sadrosadati and Onur Mutlu},
  year={2021},
  eprint={2105.03725},
  archivePrefix={arXiv},
  primaryClass={cs.AR}
}

Setting up DAMOV

Repository Structure and Installation

We point out next to the repository structure and some important folders and files.

.
+-- README.md
+-- get_workloads.sh
+-- simulator/
|   +-- command_files/
|   +-- ramulator/
|   +-- ramulator-configs/
|   +-- scripts/
|   +-- src/
|   +-- templates/

Step 0: Prerequisites

Our framework requires both ZSim and Ramulator dependencies.

  • Ramulator requires a C++11 compiler (e.g., clang++, g++-5).
  • ZSim requires gcc >=4.6, pin, scons, libconfig, libhdf5, libelfg0: We provide two scripts setup.sh and compile.sh under simulator/scripts to facilitate ZSim's installation. The first one installs all ZSim's dependencies. The second one compiles ZSim.
  • We use lrztar to compress files.

Step 1: Installing the Simulator

To install the simulator:

cd simulator
sudo sh ./scripts/setup.sh
sh ./scripts/compile.sh
cd ../

Step 2: Downloading the Workloads

To download the workloads:

sh get_workloads.sh

The get_workloads.sh script will download all workloads. The script stores the workloads under the ./workloads folder.

Please, note that the workload folder requires around 6 GB of storage.

The ./workloads folder has the following structure:

.
+-- workloads/
|   +-- Darknet/
|   +-- GASE-master/
|   +-- PolyBench-ACC/
|   +-- STREAM/
|   +-- bwa/
|   +-- chai-cpu/
|   +-- hardware-effects/
|   +-- hpcc/
|   +-- hpcg/
|   +-- ligra/
|   +-- multicore-hashjoins-0.1/
|   +-- parboil/
|   +-- parsec-3.0/
|   +-- phoenix/
|   +-- rodinia_3.1/

The DAMOV Benchmark Suite

The DAMOV benchmark suite constitutes a set of 144 functions that span across 74 different applications, belonging to 16 different widely-used benchmark suites or frameworks.

Each application is instrumented to delimiter one or more functions of interest (i.e., memory-bound functions). We provide a set of scripts that set up each application in the benchmark suite.

Application's Dependencies

Please, check each workload's README file for more information regarding its dependencies.

Application’s Compilation

To aid the compilation of the applications, we provide helping scripts inside each's application folder. The scripts are called compile.py. The script (1) compiles the applications, (2) decompresses the dataset of each application, and (3) sets their expected file names as defined in the simulator's command files (please, see below).

To illustrate, to compile the STREAM applications:

cd worloads/STREAM/
python compile.py
cd ../../

DAMOV-SIM: The DAMOV Simulation Framework

We build a framework that integrates the ZSim CPU simulator with the Ramulator memory simulator to produce a fast, scalable, and cycle-accurate open-source simulator called DAMOV-SIM. We use ZSim to simulate the core microarchitecture, cache hierarchy, coherence protocol, and prefetchers. We use Ramulator to simulate the DRAM architecture, memory controllers, and memory accesses. To compute spatial and temporal locality, we modify ZSim to generate a single-thread memory trace for each application, which we use as input for the locality analysis algorithm.

(1) Simulator Configuration

Host and PIM Core Format

ZSim can simulate three types of PIM Cores:

  • OOO: An out-of-order core.
  • Timing: A simple 1-issue in-order-like core.
  • Accelerator: A dataflow accelerator model. The model is designed by issuing at every clock cycle all independent arithmetic instructions in the dataflow graph of a given basic block.

ZSim Configuration Files

The user can configure the core model, number of cores, and cache hierarchy structure by creating configuration files. The configuration file will be used as input to ZSim when launching a new simulation.

We provide sample template files under simulator/templates for different Host and PIM systems. These template files are:

  • template_host_nuca_1_core.cfg : Defines a host system with a single OOO core, private L1/L2 caches, and shared NUCA L3 cache.
  • template_host_nuca.cfg: Defines a host system with multiple OOO cores, private L1/L2 caches, and shared NUCA L3 cache.
  • template_host_nuca_1_core_inorder.cfg : Defines a host system with a single Timing core, private L1/L2 caches, and shared NUCA L3 cache.
  • template_host_nuca_inorder.cfg : Defines a host system with multiple Timing cores, private L1/L2 caches, and shared NUCA L3 cache.
  • template_host_accelerator.cfg: Defines a host system with multiple Accelerator cores, private L1/L2 caches, and shared L3 cache of fixed size.
  • template_host_inorder.cfg: Defines a host system with multiple Timing cores, private L1/L2 caches, and shared L3 cache of fixed size.
  • template_host_ooo.cfg : Defines a host system with multiple OOO cores, private L1/L2 caches, and shared L3 cache of fixed size.
  • template_host_prefetch_accelerator.cfg: Defines a host system with multiple Accelerator cores, private L1/L2 caches, L2 prefetcher, and shared L3 cache of fixed size.
  • template_host_prefetch_inorder.cfg: Defines a host system with multiple Timing cores, private L1/L2 caches, L2 prefetcher, and shared L3 cache of fixed size.
  • template_host_prefetch_ooo.cfg : Defines a host system with multiple OOO cores, private L1/L2 caches, L2 prefetcher, and shared L3 cache of fixed size.
  • template_pim_accelerator.cfg: Defines a PIM system with multiple Accelerator cores and private L1 caches.
  • template_pim_inorder.cfg: Defines a PIM system with multiple Timing cores and private L1 caches.
  • template_pim_ooo.cfg: Defines a PIM system with multiple OOO cores and private L1 caches.

Generating ZSim Configuration Files

The script under simulator/scripts/generate_config_files.py can automatically generate configuration files for a given command file. Command files are used to specify the path to the application binary of interest and its input commands. A list of command files for the workloads under workloads/ can be found at simulator/command_files. To automatically generate configuration files for a given benchmark (STREAM in the example below), one can execute the following command:

python scripts/generate_config_files.py command_files/stream_cf

The script uses the template files available under simulator/templates/ to generate the appropriate configuration files. The user needs to modify the script to point to the path of the workloads folder (i.e., PIM_ROOT flag) and the path of the simulator folder (i.e., ROOT flag). You can modify the script also to generate configuration files for different core models by changing the core type when calling the create_*_configs() function.

The script stores the generated configuration files under simulator/config_files.

(2) Running an Application from DAMOV

We illustrate how to run an application from our benchmark suite using the STREAM Add application as an example. To execution a host simulation of the STREAM Add application, running in a system with four OOO cores:

./build/opt/zsim config_files/host_ooo/no_prefetch/stream/4/Add_Add.cfg

The output of the simulation will be stored under zsim_stats/pim_ooo/4/stream_Add_Add.*.

To execution a PIM simulation of the STREAM Add application, running in a system with four OOO cores:

./build/opt/zsim config_files/pim_ooo/stream/4/Add_Add.cfg

The output of the simulation will be stored under zsim_stats/pim_ooo/4/stream_Add_Add.*.

The script under simulator/scripts/generate_config_files.py can parse some useful statistics from a simulation.

For example, the user can collect the IPC of the execution of the host simulation of the STREAM Add application, running in a system with four OOO cores by executing:

python scripts/get_stats_per_app.py zsim_stats/host_ooo/no_prefetch/4/stream_Add_Add.zsim.out

Output:
 ------------------ Summary ------------------------
Instructions: 1000002055
Cycles: 450355583
IPC: 2.22047220629
L3 Miss Rate (%): 99.9991935477
L2 Miss Rate (%): 100.0
L1 Miss Rate (%): 73.563163442
L3 MPKI: 23.4357438395
LFMR: 0.999992703522

Likewise, the user can collect the IPC of the execution of the PIM simulation of the STREAM Add application, running in a system with four OOO cores by executing:

python scripts/get_stats_per_app.py zsim_stats/pim_ooo/4/stream_Add_Add.zsim.out

Output:
 ------------------ Summary ------------------------
Instructions: 1000009100
Cycles: 284225084
IPC: 3.5183703209
L3 Miss Rate (%): 0.0
L2 Miss Rate (%): 0.0
L1 Miss Rate (%): 73.563253602
L3 MPKI: 0.0
LFMR: 0.0

In this way, the speedup the PIM system provides compared to the host system for this particular application is of 3.5183703209/ 2.22047220629 = 1.58451446.

Please, note that the simulation framework does not currently support concurrent execution on host and PIM cores.

(3) Instrumenting and Simulating New Applications

There are three steps to run a simulation with ZSim:

  1. Instrument the code with the hooks provided in workloads/zsim_hooks.h.
  2. Create configuration files for ZSim.
  3. Run.

Next, we describe the three steps in detail:

  1. First, we identify the application's hotspot. We refer to it as the offload region, i.e., the region of code that will run in the PIM cores. We instrument the application by including the following code:
#include "zsim_hooks.h"
foo(){
    /*
    * zsim_roi_begin() marks the beginning of the region of interest (ROI).
    * It must be included in a serial part of the code.
    */
	zsim_roi_begin();
	zsim_PIM_function_begin(); // Indicates the beginning of the code to simulate (hotspot).
	...
	zsim_PIM_function_end(); // Indicates the end of the code to simulate.
    /*
    * zsim_roi_end() marks the end of the ROI.
    * It must be included in a serial part of the code.
    */
	zsim_roi_end();
}
  1. Second, we create the configuration files to execute the application using ZSim. Sample configuration files are provided under simulator/config_files/. Please, check those files to understand how to configure the number of cores, number of caches and their sizes, and number prefetchers. Next, we describe other important knobs that can be changed in the configuration files:
  • pimMode=true|false: When set to true, ZSim will simulate a memory model with shorter memory latency and higher memory bandwidth. When set to false, it will simulate a regular memory device.
  • max_offload_instrs: Maximum number of offload instructions to execute.
  1. Third, we run ZSim:
./build/opt/zsim configuration_file.cfg

Getting Help

If you have any suggestions for improvement, please contact geraldo dot deoliveira at safari dot ethz dot ch. If you find any bugs or have further questions or requests, please post an issue at the issue page.

Acknowledgments

We acknowledge support from the SAFARI Research Group’s industrial partners, especially ASML, Facebook, Google, Huawei, Intel, Microsoft, VMware, and the Semiconductor Research Corporation.

Comments
  • Darknet not running on zsim

    Darknet not running on zsim

    Hi,

    For some reason, darknet workload are not getting offloaded to zsim. I see all stats being 0.

    ../simulator/config_files/host_ooo/no_prefetch/darknet/1/*

    opened by abhishekk06 2
  • HDF5 not found even though I installed it already

    HDF5 not found even though I installed it already

    Can someone please help me fix this issue?

    Building opt zsim at build/opt Checking for C library hdf5... (cached) no Checking for C library hdf5_serial... (cached) no Checking for C library hdf5_serial... (cached) no Couldn't find hdf5_serial Checking for C library hdf5_serial_hl... (cached) no Couldn't find hdf5_serial_hl ERROR: You need to install libhdf5 in the system scons: done reading SConscript files.

    opened by abhishekk06 2
  • damovworkloadspart2.git && damovworkloadspart3.git can't be Decompressing

    damovworkloadspart2.git && damovworkloadspart3.git can't be Decompressing

    Hi sir download damovworkloadspart2.git && damovworkloadspart3.git sucessfully ,error "tar: This does not look like a tar archive" during decompressing ,however, damovworkloadspart1.git can be decompressing without error, could you please check the workloads_part2.tar.lrz && workloads_part3.tar.lrz is normal or not? thanks Montage Technology (Shanghai) Co.,Ltd. 7F,Technology Bldg.,900 Yi Shan Rd, Shanghai 200233, China Tel: 021-54679038 Ext: 18263 Fax: 021-54263132 E-mail: [email protected] 澜起科技(上海)股份有限公司 上海市宜山路900号科技大楼A栋7楼(200233) Phone: +86-18601425768

    opened by john1shanghai 2
  • Help in enabling logger

    Help in enabling logger

    Hi,

    Can someone explain how to enable debug logger? I did uncomment the following line in Sconstruct but I still don't see cache debug prints. :/

    env["CPPFLAGS"] += " -D_LOG_TRACE_=1"

    opened by abhishekk06 1
  • Hitting the following error while trying to run test/simple.cfg on zsim

    Hitting the following error while trying to run test/simple.cfg on zsim

    Hi,

    Can someone please help?

    ./build/opt/zsim tests/simple.cfg [H] Starting zsim, built Mon Jan 24 11:29:01 EST 2022 (rev no git repo) [H] Creating global segment, 1024 MBs [H] Global segment shmid = 25591808 [H] Panic on build/opt/config.cpp:229: Mandatory setting sim.stats (string) not found

    opened by abhishekk06 1
  • BFS Comp doesn't exist

    BFS Comp doesn't exist

    ZSIM_TRACE_O1 is never being used or compiled which is needed for the BFS COMP

    abhishekk105:simulator> grep -rin "zsim_trace" ../workloads/chai-cpu/BFS/*
    ../workloads/chai-cpu/BFS/kernel.cpp:46:#ifdef ZSIM_TRACE_03
    ../workloads/chai-cpu/BFS/kernel.cpp:51:#ifdef ZSIM_TRACE_03
    ../workloads/chai-cpu/BFS/kernel.cpp:73:#ifdef ZSIM_TRACE_03
    ../workloads/chai-cpu/BFS/kernel.cpp:78:#ifdef ZSIM_TRACE_03
    ../workloads/chai-cpu/BFS/kernel.cpp:83:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/kernel.cpp:87:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/kernel.cpp:100:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/kernel.cpp:106:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/kernel.cpp:114:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/kernel.cpp:119:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/kernel.cpp:126:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/kernel.cpp:131:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/main.cpp:240:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/main.cpp:244:#ifdef zsim_trace_02
    ../workloads/chai-cpu/BFS/main.cpp:251:#ifdef ZSIM_TRACE_03
    ../workloads/chai-cpu/BFS/main.cpp:256:#ifdef ZSIM_TRACE_03
    ../workloads/chai-cpu/BFS/main.cpp:262:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/main.cpp:267:#ifdef ZSIM_TRACE_02
    ../workloads/chai-cpu/BFS/main.cpp:294:#ifdef ZSIM_TRACE_00
    ../workloads/chai-cpu/BFS/main.cpp:301:#ifdef ZSIM_TRACE_00		    
    ../workloads/chai-cpu/BFS/Makefile:42:CXX_FLAGS= -O3 -std=c++11 -DZSIM_TRACE_03
    
    opened by abhishekk06 0
  • Help with enabling debugger (gdb)

    Help with enabling debugger (gdb)

    Hi,

    I am having a hard time debugging zsim. Attach debugger doesn't work for me. For some reason, it pops up a UI a bit too late (no clue why). Also, gdb doesn't show all the modules (especially filter array and etc). Any help is much appreciated.

    opened by abhishekk06 0
  • Hitting error while trying to run YOLO on zsim

    Hitting error while trying to run YOLO on zsim

    Error backtrace

    [S 0] Failed assertion on build/opt/profile_stats.h:62 'endNs >= startNs' (with '1649980987003149443 >= 1649980987003952489') [S 0] [1] Internal exception detected: [S 0] [1] Code: 1 [S 0] [1] Address: 0x7ffff61ef52e [S 0] [1] Description: Exception Code: ACCESS_INVALID_ADDRESS. Exception Address = 0x7ffff61ef52e. Access Type: UNKNOWN. Access Address = 0x000000000 [S 0] [1] Caused by invalid access to address 0x0 [S 0] [1] Backtrace (10/40 max frames) [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/build/opt/zsim.cpp:1462 / InternalExceptionHandler(unsigned int, LEVEL_BASE::EXCEPTION_INFO*, LEVEL_VM::PHYSICAL_CONTEXT*, void*) [S 0] [1] :? / LEVEL_PINCLIENT::IEH_CALLBACKS::NotifyInternalException(unsigned int, LEVEL_BASE::EXCEPTION_INFO*, LEVEL_VM::CONTEXT*) [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/pin/intel64/bin/pinbin(_ZN8LEVEL_VM12SIGNALS_IMPL19InternalHandlerSyncEiPN7BARECRT8SIGXINFOEPN5PINVM11ISIGCONTEXTEPPKNS_14SCT_ATTRIBUTESEPNS_5PCTXTEPj+0x444) [0x3043a9454] [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/pin/intel64/bin/pinbin(_ZN8LEVEL_VM12SIGNALS_IMPL20HandlePhysicalSignalEPN7BARECRT8SIGXINFOEPN5PINVM11ISIGCONTEXTE+0x124) [0x3043aa1f4] [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/pin/intel64/bin/pinbin(_ZN5PINVM28SIGNAL_DETAILS_LINUX_INTEL6415InternalHandlerEiPN7BARECRT8SIGXINFOEPv+0xe8) [0x304438c88] [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/pin/intel64/bin/pinbin(BARECRT_SigReturnRt+0) [0x30446603c] [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/build/opt/timing_event.h:160 / ContentionSim::simulatePhaseThread(unsigned int) [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/build/opt/contention_sim.cpp:292 / ContentionSim::simThreadLoop(unsigned int) [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/pin/intel64/bin/pinbin(_ZN8LEVEL_VM17VM_THREAD_DB_UNIX13THREAD_RUNNER9RunThreadEPN11OS_SERVICES7ITHREADE+0x289) [0x3043b3239] [S 0] [1] /home/mdl/azk6085/2022_work/DAMOV/simulator/pin/intel64/bin/pinbin(_ZN11OS_SERVICES6THREAD12RootFunctionEPv+0x26) [0x304465636] C: Tool (or Pin) caused signal 11 at PC 0x7ffff61ef52e [H] Child 18872 done [H] Panic on build/opt/zsim_harness.cpp:123: Child 18872 (idx 0) exit was anomalous, killing simulation

    opened by abhishekk06 0
  • excute the sh ./script/compile fail

    excute the sh ./script/compile fail

    Hi sir

    when i execute { sh ./script/compile.sh },there are two errors show after compile make[1]: *** [Makefile:370: libconfig.info] Error 127 make[1]: Leaving directory '/home/DAMOV-main/simulator/libconfig/doc' make: *** [Makefile:445: install-recursive] Error 1 i have excuted it under root with ubuntu 20.4 and try to install relates application from the website ,still fail , i noticed that the ubuntu 20.4 not including in the os support list , could you please give some advices?

    Montage Technology (Shanghai) Co.,Ltd. 7F,Technology Bldg.,900 Yi Shan Rd, Shanghai 200233, China Tel: 021-54679038 Ext: 18263 Fax: 021-54263132 E-mail: [email protected] 澜起科技(上海)股份有限公司 上海市宜山路900号科技大楼A栋7楼(200233) Phone: +86-18601425768

    opened by john1shanghai 1
Owner
SAFARI Research Group at ETH Zurich and Carnegie Mellon University
Site for source code and tools distribution from SAFARI Research Group at ETH Zurich and Carnegie Mellon University.
SAFARI Research Group at ETH Zurich and Carnegie Mellon University
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